thumbv7em-none-eabi and thumbv7em-none-eabihf

Tier: 2

Bare-metal target for CPUs in the Armv7E-M architecture family, supporting a subset of the T32 ISA.

Processors in this family include the:

See arm-none-eabi for information applicable to all arm-none-eabi targets, in particular the difference between the eabi and eabihf ABI.

Target maintainers

Target CPU and Target Feature options

See the bare-metal Arm docs for details on how to use these flags.

Table of supported CPUs for thumbv7em-none-eabi

CPUFPUDSPTarget CPUTarget Features
AnyNoYesNoneNone
Cortex-M4NoYescortex-m4+soft-float
Cortex-M4FSPYescortex-m4None
Cortex-M7NoYescortex-m7+soft-float
Cortex-M7FSPYescortex-m7-fp64
Cortex-M7FDPYescortex-m7None

Table of supported CPUs for thumbv7em-none-eabihf

CPUFPUDSPTarget CPUTarget Features
AnySPYesNoneNone
Cortex-M4FSPYescortex-m4None
Cortex-M7FSPYescortex-m7-fp64
Cortex-M7FDPYescortex-m7None

Arm Cortex-M4 and Arm Cortex-M4F

The target CPU is cortex-m4.

  • All Cortex-M4 have DSP extensions
    • support is controlled by the dsp target-feature
    • enabled by default with this target
  • Cortex-M4F has a single precision FPU
    • support is enabled by default with this target-cpu
    • disable support using the +soft-float feature (eabi only)

Arm Cortex-M7 and Arm Cortex-M7F

The target CPU is cortex-m7.

  • All Cortex-M7 have DSP extensions
    • support is controlled by the dsp target-feature
    • enabled by default with this target
  • Cortex-M7F have either a single-precision or double-precision FPU
    • double-precision support is enabled by default with this target-cpu
      • opt-out by using the -f64 target-feature
    • disable support entirely using the +soft-float feature (eabi only)