thumbv8m.main-none-eabi and thumbv8m.main-none-eabihf

Tier: 2

Bare-metal target for CPUs in the Mainline Armv8-M architecture family, supporting a subset of the T32 ISA.

Processors in this family include the:

See arm-none-eabi for information applicable to all arm-none-eabi targets, in particular the difference between the eabi and eabihf ABI.

Target maintainers

Target CPU and Target Feature options

See the bare-metal Arm docs for details on how to use these flags.

Table of supported CPUs for thumbv8m.main-none-eabi

CPUFPUDSPMVETarget CPUTarget Features
UnspecifiedNoNoNoNoneNone
Cortex-M33NoNoNocortex-m33+soft-float,-dsp
Cortex-M33NoYesNocortex-m33+soft-float
Cortex-M33SPNoNocortex-m33-dsp
Cortex-M33SPYesNocortex-m33None
Cortex-M35PNoNoNocortex-m35p+soft-float,-dsp
Cortex-M35PNoYesNocortex-m35p+soft-float
Cortex-M35PSPNoNocortex-m35p-dsp
Cortex-M35PSPYesNocortex-m35pNone
Cortex-M55NoYesNocortex-m55+soft-float,-mve
Cortex-M55DPYesNocortex-m55-mve
Cortex-M55NoYesIntcortex-m55+soft-float,-mve.fp
Cortex-M55DPYesIntcortex-m55-mve.fp
Cortex-M55DPYesInt+Floatcortex-m55None
Cortex-M85NoYesNocortex-m85+soft-float,-mve
Cortex-M85DPYesNocortex-m85-mve
Cortex-M85NoYesIntcortex-m85+soft-float,-mve.fp
Cortex-M85DPYesIntcortex-m85-mve.fp
Cortex-M85DPYesInt+Floatcortex-m85None

Table of supported CPUs for thumbv8m.main-none-eabihf

CPUFPUDSPMVETarget CPUTarget Features
UnspecifiedSPNoNoNoneNone
Cortex-M33SPNoNocortex-m33-dsp
Cortex-M33SPYesNocortex-m33None
Cortex-M33PSPNoNocortex-m35p-dsp
Cortex-M33PSPYesNocortex-m35pNone
Cortex-M55DPYesNocortex-m55-mve
Cortex-M55DPYesIntcortex-m55-mve.fp
Cortex-M55DPYesInt+Floatcortex-m55None
Cortex-M85DPYesNocortex-m85-mve
Cortex-M85DPYesIntcortex-m85-mve.fp
Cortex-M85DPYesInt+Floatcortex-m85None

Arm Cortex-M33

The target CPU is cortex-m33.

  • Has optional DSP extensions
    • support is controlled by the dsp target-feature
    • enabled by default with this target-cpu
  • Has an optional single precision FPU
    • support is enabled by default with this target-cpu
    • disable support using the +soft-float feature (eabi only)

Arm Cortex-M35P

The target CPU is cortex-m35p.

  • Has optional DSP extensions
    • support is controlled by the dsp target-feature
    • enabled by default with this target-cpu
  • Has an optional single precision FPU
    • support is enabled by default with this target-cpu
    • disable support using the +soft-float feature (eabi only)

Arm Cortex-M55

The target CPU is cortex-m55.

  • Has DSP extensions
    • support is controlled by the dsp target-feature
    • enabled by default with this target-cpu
  • Has an optional double-precision FPU that also supports half-precision FP16 values
    • support is enabled by default with this target-cpu
    • disable support using the +soft-float feature (eabi only)
  • Has optional support for M-Profile Vector Extensions
    • Also known as Helium Technology
    • Available with only integer support, or both integer/float support
    • The appropriate feature for the MVE is either mve (integer) or mve.fp (float)
    • mve.fp is enabled by default on this target CPU
    • disable using -mve.fp (disable float MVE) or -mve (disable all MVE)

Arm Cortex-M85

The target CPU is cortex-m85.

  • Has DSP extensions
    • support is controlled by the dsp target-feature
    • enabled by default with this target-cpu
  • Has an optional double-precision FPU that also supports half-precision FP16 values
    • support is enabled by default with this target-cpu
    • disable support using the +soft-float feature (eabi only)
  • Has optional support for M-Profile Vector Extensions
    • Also known as Helium Technology
    • Available with only integer support, or both integer/float support
    • The appropriate feature for the MVE is either mve (integer) or mve.fp (float)
    • mve.fp is enabled by default on this target CPU
    • disable using -mve.fp (disable float MVE) or -mve (disable all MVE)